A vertical organic field effect transistor (VOFET) (as field effect transistors in general) is formed with three electrodes, namely a gate electrode, a source electrode and a drain electrode. In a VOFET, the source electrode and the drain electrode are connected with each other by an organic semiconductor. The gate electrode is separated from the source electrode and the drain electrode by an insulator.
VOFETs are considered as potential devices for AMOLED (AMOLED—active-matrix organic light-emitting diode) backplane technology. Owing to their vertical channel geometry vertical transistor concepts are supposed to be superior to horizontal thin-film transistors (OTFT) since they are offering a high on-state current. However, a sufficient on/off-ratio, a reduced sensitivity to the particular properties of the insulator material, larger performance stability and an improved uniformity are still to be shown. Moreover, VOFETs require a complex fabrication protocol which might limit their field of applications and the exploitation in total.
Hence, there is a particular interest in having VOFETs with a high on-current density, a high on/off ratio, a large degree of operational stability and uniformity and a simple fabrication protocol being compatible to mass production techniques.
The known VOFETs have the following layer sequence: substrate/gate electrode/insulator/source electrode/drain electrode, the so-called bottom gate architecture. In such design, a k-high insulator can be used as a gate insulator and the gate can be patterned by state-of-the-art photolithography. However, there are also several drawbacks in this layout. In order to achieve a high-resolution as e.g. required for display applications, a fast and reliable patterning technique is required. This architecture, however, requires a structuring of source and drain electrode on the organic semiconductor material. Even if this can in principle be made by shadow masks, a high resolution technique such as photo-lithography is required for backplane transistors. However, photo-lithography on organic semiconductor materials has a limited freedom of processing. In particular, etching recipes are barely applicable owing to the sensitivity of the organic material. Lift-off processes—the alternative to etching—are not desired by the microelectronic industry owing to the low yield, the limited resolution and the duration.
The document WO 2010/113163 A1 discloses a vertical organic field effect transistor and a method for producing the same. The transistor comprises a patterned electrode structure which is enclosed between a dielectric layer and an active element. The active element is either an organic semiconductor. The electrode structure is patterned by using a block copolymer material as a patterning mask. Hereby, the thickness of the patterned layer and lateral feature size can be selected. However, device described in the document WO 2010/113163 A1 are patterned by shadow masks and a special self-assembling process and are therefore not compatible to mass productions processes such as photolithography and etching.
A method for forming an organic device having a patterned conductive layer is disclosed in document WO 2011/139774. The method comprises the steps of depositing an organic layer on a substrate and coating the organic layer with a photoresist solution to form a photo-patternable layer. The photoresist solution includes a fluorinated photoresist material and a fluorinated solvent. Selected portions of the photo-patternable layer are radiated to form a pattern. A conductive layer is coated over the organic layer. A portion of the conductive layer is removed to form a patterned conductive layer. This particular method disclosed in document WO 2011/139774 enables photolithography on organic semiconductors. However, in order to pattern e.g. a metal layer on top of the organic semiconductor either lift-off or etching have to be used. Lift-off and etching have been demonstrated on organic semiconductor. However, both processes are not compatible to mass production because of low process yield.
K. Nakamura et al., Applied Physics Letters Vol. 89, page 103525 (2006) discloses a vertical organic light emitting transistor. A gate electrode is arranged on a substrate and covered by a gate insulating layer. A semiconducting layer is coated on the gate insulating layer. A source electrode, an insulating layer, and a hole transporting layer are arranged on the semiconducting layer. Further, the transistor comprises an emitting layer and a drain electrode. In this way a vertical type organic light-emitting transistor is generated. However, also these devices are hardly compatible with mass production since they require shadow mask patterning which cannot be adopted for small structures as required in microelectronics.
Kleemann et al. disclosed in document WO 2013/149947 A1 a vertical organic transistor integrated by photolithography. However, even if photolithography, lift-off and etching can be performed on organic semiconductor materials as shown in this document, such processes are not desired in mass production because of the natural chemical and mechanical sensitivity of organic semiconductors.